Power Optimized Memory Organization Using Multi-Bit-Flip-Flop Approach and Enhanced Ring Counter

Power reduction has become a vital design goal for sophisticated design applications, whether mobile or not. dropping power consumption in design enables better, cheaper products to be designed and power-related chip failures to be minimized. Researchers have shown that multi-bit flip-flop is an effective method for clock power consumption reduction. The underlying idea behind multi-bit flip-flop method is to eliminate total inverter number by sharing the inverters in the flip-flops. In this paper, we will review multi-bit flip-flop concepts, and introduce the benefits of using multibit flip-flops in our design. Then, we will show how to implement multi-bit flip-flop methodology by XILINX Design Compiler. Experimental results indicate that multi-bit flip-flop is very effective and efficient method in lower-power designs.